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Rev B1 ECN-07 — LIS2DW12 accelerometer (draft)

Draft — 230220 only

Replace LIS2DH12TR with LIS2DW12TR on Tag 230220. Not approved. Current revision is A2.

Ships in the same B1 respin as Rev B1 ECN-01 — Tag GPIO remap. Station boards (232200–232204) do not populate an accelerometer.

Why

A2 uses LIS2DH12TR — adequate for basic motion, but limited for asset utilization use cases (machines, tools, vehicles, equipment) where we need:

  • Higher sample rates for vibration / activity signatures
  • Much lower active current at useful ODR
  • Finer motion-state features (activity / inactivity, wake-up) for long battery life

LIS2DW12TR (ST “femto” family) targets continuous sensing at 200 Hz in low-power mode 1 at ~10 µA (typical @ 1.8 V, low-noise off — see datasheet Table 7 / electrical characteristics). That enables utilization-oriented sampling without dominating Tag battery budget.

What changes

A2 B1 (proposed)
Part LIS2DH12TR LIS2DW12TR
Interface SPI (4-wire) SPI (4-wire) — same MCU nets after GPIO B1
Package LGA-12, 2 × 2 × 1.0 mm max LGA-12, 2 × 2 × 0.7 mm max
ODR (example) Limited low-power ODR vs target Up to 200 Hz in low-power modes; 1600 Hz in high-performance mode
Active current (200 Hz) — (see LIS2DH12 datasheet) ~10 µA typ. (LPM1, low-noise off @ 1.8 V)

Datasheet: LIS2DW12 (DS12129) · ST product page

Application note for mode / ODR trade-offs: AN5038 (ST).

Package and pinout (vs LIS2DH12TR)

Both parts use LGA-12, 2 × 2 mm (ST “femto” family). Not a drop-in BOM swap — verify land pattern against ST recommendations before layout:

Topic LIS2DH12TR (A2) LIS2DW12TR (B1)
Body height 1.0 mm max 0.7 mm max
ST land pattern Check LIS2DH12 package drawing Check LIS2DW12 package drawing
SPI signals (ST Table 2) Pin 1 SPC, 2 CS, 3 SDO, 4 SDI, 11 INT2, 12 INT1 Same pin numbers and roles
Pin 5 RES → GND NC (may tie GND)
Pin 7 GND RES → GND

Schematic nets unchanged: ACC.SPC, ACC.CS, ACC.SDO, ACC.SDI, ACC.INT1, ACC.INT2 map to the same device pins on both parts. The 230220 pin table lists signal names only (no device pin numbers) — match nets to the datasheet when placing either part.

Still required for B1: new Altium footprint / 3D model from ST land pattern, BOM update, new firmware driver (register map differs).

Scope

Item B1 change
230220 New ACC footprint, BOM, schematic ref U3
Firmware Replace LIS2DH12 driver with LIS2DW12; utilization / motion policy TBD
232200–232204 No change (ACC not populated)

GPIO after B1 remap (unchanged by this proposal): SPI on P1.02 / P1.03 / P1.10 / P1.08; INT1 / INT2 on P1.11 / P1.13.

Open items

  • Altium footprint and 3D model from ST LIS2DW12 land pattern (pad layout vs LIS2DH12 — verify, do not assume identical)
  • Decoupling and SPI mode per datasheet § SPI interface
  • Firmware: LIS2DW12 driver + utilization algorithm (ODR, FIFO, wake thresholds)
  • BOM / sourcing check (LCSC, DigiKey — LIS2DW12TR)