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232200 Station Base Std — Revision History

Revision history for the EverTag Connectivity Module Base PCB Std (232200). See Revisions Policy for tag naming and lock procedure.

Rev Released Status Git Tag
A2 2026-04-13 Current pcb-232200-A2
A1 (unrecorded) Superseded

Rev A2 — 2026-04-13 — Released

Git tag: pcb-232200-A2

Release artifacts (stored in the release repository):

Type Filename
Release package pcb-232200A2 - release 2026-04-13.zip
Manufacturing package pcb-232200A2 - manuf 2026-04-13.zip

Changes from A1

Retroactive entry — original A1→A2 change notes were not preserved at release time. Fill in here if records are recovered.

Known limitations (carried into Rev B planning)

The nRF54L15 datasheet review (May 2026) identified silicon constraints affecting this revision:

  • UART0 debug (P0.02 TX / P2.07 RX) is split across ports P0 and P2. No UARTE instance can bind that combination — UART0 RX is non-functional. TX-only debug logging via UARTE30 (P0) remains possible by leaving PSEL.RXD disconnected.
  • Interrupt-driven service button (P2.06) cannot use GPIOTE — P2 has no GPIOTE peripheral. Button must be polled.

Both are addressed in the planned Rev B1 GPIO remap. See Firmware Compatibility for full impact analysis.


Rev A1 — (date unrecorded) — Superseded

Initial prototype build. No formal release artifacts on file in the release repository.